Storage Class Memory, or SCM is a loose term to describe storage technologies that sit in between NAND Flash drives and DIMM memory, in terms of performance and cost. SCM also retains data after a power cycle, unlike DRAM, and does not suffer from the cell deterioration after data re-writes that limits NAND lifespan.
Several SCM contenders existed in 2018, including 3D XPoint, MRAM, PCM, NRAM and STT-RAM. It was envisaged that SCM would fit the storage heirachy as either a low level DIMM cache, addressed at byte level like DRAM, or as a higher level NAND cache addressed at block level.
Now in 2020 there is only one game in town, Intel's Optane memory, based on 3D Xpoint, and running as a cache in front of NAND storage or as DIMM chips on a motherboard.
In 2020 the Optane PMEM 200 series DIMMs come in 128GB, 256GB and 512GB capacities and their sequential bandwidth is up to 8.10GB/sec for reads and 3.15GB/sec for writes. The older Optane DIMM chips used 2-layer Xpoint, these second generation chips use 4-layer XPoint, thus deliver data a little faster and with a little more bandwidth than the first generation chips. To put some speeds into context, a SAS SSD flash drive has a read latency of about 75,000ns, and DRAM about 100ns. Optane sits in the middle at 350ns.
There is a lot of confusion about how exactly Optane works, and Intel are not telling us. We do know that Intel Optane uses 3D XPoint (called crosspoint) technology, which was jointly developed with Micron. These two have developed phase-change memory (PCM) technologies previously but they claim Optane is not PCM, but maybe a variant of ReRAM. When questioned, Brian Krzanich the Intel CEO would only state that XPoint switching was based on 'bulk material properties'. Some industry experts state decisively that the first release of Intel's 3D XPoint was a 2-layer implementation of PCM, thus assuming that the Intel statement was just an attempt at misdirection. However the two technologies, PCM and ReRAM are quite similar. In simple terms, PCM uses a glass like material can be changed between an ordered crystal form to a random, amorphous form by applying an electric current, and these forms have different resistance values. ReRAM works in a similar way by changing the resistance across a dielectric solid-state material.
Phase-Change Memory is made from a Chalcogenide glass material whose state changes from crystalline to amorphous and back again by using electric current. The amorphous or unstructured state is bit like glass and has high resistance, so if a small voltage is applied to a small part of the material, little or no current will flow.
However if a larger voltage is applied, the high resistance produces heat, which allows the molecules in the material to rearrange into a low resistance crystal lattice, which is more like a metal. The material has now changed from one state to another and if it is 'read' now, the resistance is low and current will flow. This gives you the binary states, 0 amd 1. This writing process is fast, in the order of about 100ns. Now if we apply a higher voltage, enough to make the material completely molten, then remove that voltage so it cools quickly, it will go back to the amorphous state again.
The read and write process is measured in nanoseconds and is much faster that NAND memory, and also writing can take place at bit level. For NAND storage, data must be read in 16 KB pages. Also NAND data must be erased on MB blocks, whereas PCM does not need an erase cycle. The lower voltages Optane uses should, in turn, result in lower power consumption compared to DRAM and NAND.
ReRAM works a bit like a semiconductor, except that it uses an oxide layer with defects where the oxygen has been removed. When an electric field is applied to the layer, these defects (or holes) can move through the layer a bit like electrons in a semiconductor. This layer, or dielectric, is normally an insulator but if a relatively high voltage is applied to it, a conducting filament forms through the layer. This filament can be removed by applying a different voltage, this providing two switchable states with differing resistance. ReRAM proponents claim this this process is stable over a wide range of temperatures, and is highly scalable.
The simple architecture of a 2 tier 3D XPoint structure is shown in the diagram below. Each memory cell has a selector sitting above it, and the two are connected to a wordline and bitline connections arranged in a grid, hence the 'crosspoint' name. The signal that accesses the cell to either read or write data is applied to the word line. The data that is being writen into or read from the memory are found on the bit lines.
Dell EMC have fully embraced Optane storage with their PowerMAX storage subsystem, which uses Optane as a high performance tier. EMC will also provide a Powermax with Optane only storage. Other vendors have also adopted Optane. For example, HPE has added Optane caching to its 3PAR arrays.
At the other end of the scale, I recently (Aug. 2020) had a wander round my local PC shop, and saw all flash PCs with an Optane cache retailing at an affordable £800.
HybriDIMM appears to use processor DIMM as a cache, with NAND Flash as the backing storage. It basically uses software to predict which data an application will need next, then pre-fetch that data into DIMM memory, so by the time the application needs it, it is already in the fastest storage available.
According the the Netlist website. "Using an industry standard DDR4 LRDIMM interface, HybriDIMM is the first SCM product to operate in current Intel™ x86 servers without BIOS and hardware changes, and the first unified DRAM-NAND solution that scales memory to terabyte storage capacities and accelerates storage to nanosecond memory speeds."
Western Digital’s SCM product is the ME200 Memory Extension drive, which expands system memory by adding NVMe NAND, with MemoryONE software to control it.
Western Digital states that "Ultrastar memory drive allows for the transparent expansion of system memory, enabling larger data sets to be used for analytics computations, more data to be stored in front-end web caches, and overall more work that can be accomplished within each server. "
Magnetic RAM (MRAM) and Spin Transfer Torque RAM (STT-RAM) work at quantum level to change the spin of electrons. This changes the magnetic orientation of a cell so it has two stable states, spin up and spin down, which can be used to describe two bit states. For example, an STT-RAM bit cell consists of a transistor with one gate connected to a bit line through a magnetic tunnel junction. The resulting bit states are non-volative, have a very long life, and do not require much power. It appears that STT-RAM could one day replace both DIMM and NAND flash to produce one unified memory.
One developer in this area is Everspin, who are developing MRAM technology that uses the spin torque transfer property to alter the spin of electrons by using a polarizing current. Everspin states that "We have developed materials and Perpendicular MTJ stack designs with high perpendicular magnetic anisotropy, which provides long data retention, small cell size, greater density, high endurance and low power."
As a bit of an aside, Electrons do not really 'spin' as in the accepted sense of the word. Spin is just one of the allowable quantum states of an electron, one which describes the angular momentum and can be either ½, or -½. The different states are commonly called 'up' or 'down', though neither of these have any macro-world physical meaning either.
NRAM (Nanotube RAM) uses carbon nanotubes (CNTs) for storage and is claimed to have DRAM-like speed, and a very long lifespan. The nanotubes can either be touching or slightly separated depending on their position. A memory cell consists of several CNTs sandwiched between two electrodes. If enough CNTs are touching, the cell has low resistance, and if the CNTs are separated, the resistance is high. This produces two stable binary states, predicted to last for thousands of years. These states are both held together, and apart by Van der Waals forces, forces which act at atomic and molecular levels.
The status of the cell, high or low resistance, is detected or 'read' by applying a low voltage between the electrodes. If a larger (but still relatively small) voltage is applied to the cell, this changes the state of the CNTs, either attracting the CNTs if the cell was in a '0' high resistance state, or separating the CNTs if the cell was in a low resistance '1' state. When this reset voltage is removed, the cell remains in its new state. NRAM is non-volatile, the cells retain their state if power is removed. Read and write access times could be around 3-5 ns, which makes it potentially faster than DRAM. The developers still need to sort out a few technical challenges before it will become mainstream, but if they can be resolved, then NRAM could be the storage technology of the future.